IHL Kickoff meeting
→
Europe/Berlin
Room: US-C 109 (Universität Siegen – Unteres Schloss Campus)
Room: US-C 109
Universität Siegen – Unteres Schloss Campus
Unteres Schloß 3,
57072 Siegen
Qader Dorosti,
Michael Karagounis
(FH Dortmund)
Description
🔗 Join Webex Meeting:
https://uni-siegen.webex.com/uni-siegen-en/j.php?MTID=m4148b92d3ba17d835486cc79a0aca976
The Intelligent Hardware Lab (IHL) Kickoff Meeting marks the launch of the IHL within the Cluster of Excellence CmF. The meeting brings together researchers and collaborators to present current activities, identify common research interests, and define the first collaborative projects and technology roadmap of the IHL.
Participants
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10:00
→
10:30
Registration & Welcome Coffee
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10:30
→
11:10
Welcome & VisionConvener: Qader Dorosti
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10:30
Welcome & Introduction 10mSpeaker: Qader Dorosti
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10:40
Intelligent Hardware Lab: Vision and Objectives 15mSpeaker: Qader Dorosti
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10:30
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11:10
→
12:25
Current Expertise & Capabilities
- 11:10
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11:20
FPGA Systems & Digital Electronics 10mSpeaker: Michael Karagounis (FH Dortmund)
- 11:30
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11:40
Cologne Chip: Industrial Partnership and Future Collaboration 15mSpeaker: Michael Gude ((CEO, Cologne Chip AG))
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11:55
Discussion: Existing Expertise and Future Opportunities 10m
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12:25
→
13:30
Lunch
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13:30
→
15:40
Scientific Drivers & Strategic Partnerships
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13:30
eFPGA Technologies: Vision and Opportunities for the IHL 15mSpeaker: Prof. Dirk Koch (Heidelberg University)
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13:45
EuCAIF: AI for Intelligent Hardware and Scientific Computing 15mSpeaker: Prof. Johan Messchendorp
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14:00
INSIGHT: Detector Electronics Challenges and Opportunities for the IHL 15mSpeakers: Benedikt Otto, Martin Bieker (Helmholtz-Institut für Strahlen- und Kernphysik)
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14:15
Edge Computing Architectures and Prospects 15mSpeaker: Dr André Zambanini (Forschungszentrum Jülich)
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14:30
Towards a readout ASIC for the Lohengrin Experiment 15mSpeaker: Matthias Hamer (Uni Siegen)
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14:45
DEEP Project: Neural Networks on Hardware 10mSpeaker: Patrick Schwäbig
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14:55
Digital Design Infrastructure & Continuous Integration 15mSpeaker: Ilja Bekman (ICA (PGI-4), Forschungszentrum Juelich GmbH)
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15:10
Discussion 30m
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13:30
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15:40
→
16:10
Coffee Break
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16:10
→
17:35
Building the Intelligent Hardware Lab
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16:10
Developing the IHL Infrastructure & Ecosystem 15m
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16:25
Technology Vision & Roadmap (ASIC, FPGA, eFPGA & AI Hardware) 20m
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16:45
Round Table: Defining the First IHL Activities 35m
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17:20
Summary, Action Items & Next Steps 10m
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17:30
Closing Remarks 5m
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16:10
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10:00
→
10:30