IHL Kickoff meeting

Session

Current Expertise & Capabilities

Jul 17, 2026, 11:10 AM

Room: US-C 109 (Universität Siegen – Unteres Schloss Campus)

5. Analog & Mixed-Signal ASIC Design

Tetsuichi Kishishita

7/17/26, 11:10 AM

6. FPGA Systems & Digital Electronics

Michael Karagounis (FH Dortmund)

7/17/26, 11:20 AM

7. AI-based Real-Time Waveform Triggering

Vesselin Dimitrov

7/17/26, 11:30 AM

25. Cologne Chip: Industrial Partnership and Future Collaboration

Michael Gude ((CEO, Cologne Chip AG))

7/17/26, 11:40 AM

10. Discussion: Existing Expertise and Future Opportunities

7/17/26, 11:55 AM

9. AI Hardware Validation & Test Infrastructure

4. Digital ASIC Design within the CmF Cluster

8. Digital Design Infrastructure & Continuous Integration

Ilja Bekman (ICA (PGI-4), Forschungszentrum Juelich GmbH)